l Memory: 2/4GB LPDDR5 (Capacity varies depending on the purchased version)
l EMMC: 32/64GB eMMC (Capacity varies depending on the purchased version)
The RK3576 stamp hole SOM( system-on-module) is a domestically produced board based on the Rockchip RK3576 processor. It features a compact 45mm x 45mm design with 288 pins and supports single 5V power supply, simplifying system power design. The board utilizes a 12-layer PCB with lead-free immersion gold process, ensuring signal integrity and excellent EMC characteristics. It also integrates the RK806S-5 power management chip, effectively improving system integration and energy efficiency.
The core processor, RK3576, uses a big.LITTLE architecture with 4 Cortex-A72 cores (2.2GHz) and 4 Cortex-A53 cores (2.0GHz), coupled with an independent NEON coprocessor, making it suitable for ARMPC, edge computing, and multimedia devices. The chip features a powerful multimedia processing engine, supporting 4K@120fps H.265/VP9/AV1 decoding and 4K@60fps H.264/H.265 encoding, and integrates a high-performance JPEG codec and image pre-processing/post-processing unit.
For graphics processing, the RK3576 is equipped with a Mali-G52 GPU, fully supporting OpenGL ES3.2, OpenCL2.0, and Vulkan1.1 graphics APIs. Combined with a dedicated 2D acceleration engine, it provides a smooth visual experience. Its built-in 16MP ISP supports advanced image processing algorithms such as HDR, 3A, and 3DNR, meeting high-end imaging requirements.
It boasts outstanding AI computing capabilities, integrating an NPU that supports mixed-precision operations such as INT4/INT8/FP16, efficiently running models from mainstream AI frameworks like TensorFlow/PyTorch. In terms of memory, it supports high-performance LPDDR5, providing sufficient bandwidth for various application scenarios. This solution is particularly suitable for embedded applications requiring high-performance computing, AI inference, and multimedia processing. The RK3576's high-performance LPDDR5 provides the necessary memory bandwidth for high-performance scenarios.
l CPU: Quad-core Cortex-A72 processor + Quad-core Cortex-A53 processor
l Clock Speed: 2.2GHz
l Memory: 2/4GB LPDDR5 (Capacity varies depending on the purchased version)
l EMMC: 32/64GB eMMC (Capacity varies depending on the purchased version)
l Multimedia Processing: Supports 4K@120fps H.265, VP9, AVS2, and AV1 decoders; supports 4K@60fps H.264 decoder; supports 4K@60fps H.264 and H.265 encoders, high-quality JPEG encoder/decoder
l Graphics Processor: ARM Mali-G52-MC3
l NPU: Built-in independent NPU, 6 TOPS computing power @INT8
l Dimensions: 45mm x 45mm
l Interface: Stamp-hole interface, 288 pins
l Temperature: -40°C~+85°C / 0°C~+70°C
l Operating Voltage: 5V
l Operating System: Linux, Ubuntu
l SDMMC (≤2 channels): Supports SDI03.0 protocol and MMCV4.51 protocol. 4-wire data bus width; supports SDR104 mode, with a maximum speed of 200MHz. Note: Only SDMMC0 supports System Boot, and is defaulted to the SD card function; supports firmware upgrade via SD card when EMMC/UFS is blank, and also supports firmware upgrade of EMMC/UFS via SD card after EMMC/UFS boot; SDMMC0 configures VCCIO_SD_S0 to 1.8V or 3.3V output according to the peripheral and actual operating mode; SDMMC1 is 3.3V; some pin resources are multiplexed.
l SARADC (≤7 channels): SARADC resolution is 12-bit, speed 1MS/s, input voltage range is 0~1.8V; Note: SARADC_VINO_BOOT is dedicated to setting the SYSTEMBOOT boot sequence and cannot be used for other functions; SARADC_VIN1 is defaulted as the key value input sampling port, and is multiplexed as the Recovery mode button (not modifiable);
SARADC_VIN2 is the board hardware ID, not brought out; SARADC_VIN3 is multiplexed for audio detection;
SARADC_VIN4~7 can be used directly.
l USB (≤2 channels): Note: USB2_OTG0 is the default firmware burning port for RK3576, please be sure to reserve this interface in the application; USB3 and USB2.0 OTG can only function as Device or HOST simultaneously; the SS signal (5Gbps) of USB3 OTG0 is multiplexed with DP1.4; the SS signal (5Gbps) of USB3 OTG1 is multiplexed with PCIE1 or SATA1, and the USB function cannot be used when set to PCIE or SATA function;
l SATA (≤2 channels): Supports SATA PM function, each port can support 5 devices; supports SATA 1.5Gb/s, SATA 3.0Gb/s, SATA 6.0Gb/s; supports eSATA.
Note: SATA0 and PCIe0 controllers are multiplexed; SATA1 and PCIe1 or USB3_OTG1 controllers are multiplexed;
l PCIe (≤2 channels): 2 PCIe 2.1 controllers, both only support RC mode;
Note: PCIe0 and SATA0 controllers are multiplexed; PCIe1 and SATA1 or USB3_OTG1 controllers are multiplexed;
l MIPI DPHY CSI RX (≤2 channels): 2 MIPI DPHY CSI RX ports, supporting 2/4-lane MIPI-CSI mode;
Note: Splitting into 2-lane + 2-lane mode is not currently supported; a maximum of 2 cameras can be connected;
l MIPI DCPHY CSI RX (≤1 channel): 1 MIPI DCPHY CSI RX port, supporting 1/2/4-lane MIPI-DPHY mode or 0/1/2 Trio MIPI-CPHY mode;
l Note: Splitting into 2-lane + 2-lane mode is not supported; the TX and RX of the MIPI DCPHY Combo PHY can only be configured simultaneously as DPHY TX and DPHY RX modes, or simultaneously as CPHY TX and CPHY RX modes. CIF (≤1 channel): 1 channel maximum 16-bit DVP interface, supports 8/10/12/16-bit;
Note: 3.3V interface, some pin resources are shared;
l HDMI TX (≤1 channel): Supports up to HDMI 2.1, maximum support for 4K@120Hz, supports HDMI FRL mode and is backward compatible with HDMI TMDS mode;
Note: Shared with eDP controller;
l eDP (≤1 channel): Supports up to eDP 3.1, maximum support for 4K@60Hz, supports 1/2/4 Lane modes, does not support Swap; Note: Shared with eDP controller;
l MIPI DCPHYCSI TX (≤1 channel): 1 MIPI DCPHYCSI RX port, supports 1/2/3/4 Lanes MIPI-DPHY mode or 0/1/2 Trio MIPI-CPHY mode;
l Note: Does not support splitting into 2Lane+2Lane mode; MIPI DCPHY Combo PHY's TX and RX can only be configured simultaneously as DPHY TX, DPHY RX mode, or simultaneously as CPHY TX, CPHY RX mode.
l DP (≤1 channel): Supports up to eDP 3.1, maximum support for 4K@120Hz, supports 1/2/4 Lane modes, supports Swap;
Note: Shared with USB3 OTG0's SS signal;
l LCD (≤1 channel): Supports 24-bit RGB mode, maximum resolution 1920x1080@60Hz; supports 16-bit BT1120 mode, maximum resolution 1920x1080@60Hz; supports 8-bit BT656 mode, maximum resolution 720x576@60Hz; Note: Some pin resources are shared.
l EBC (≤1 channel): Supports 8-bit/16-bit output, maximum 32 levels of grayscale, maximum resolution 2560x1920@85Hz;
Note: Some pin resources are shared.
l Audio (≤9 channels): 5 groups of SAI, supporting master-slave mode, 8 to 32-bit width, and sampling rates up to 48kHz; 2 groups of PDM, master mode, supporting 8-channel input capability, 16 to 32-bit width, and sampling rates up to 192kHz; 2 groups of SPDIFTX; 1 group of DSM PWMAudio;
Note: Four ASRC (Asynchronous Sample Rate Converter) modules are provided for audio data sample rate conversion;1.8V/3.3V interface, some pin resources are shared;
l Ethernet (≤2 channels): Supports 2 RGMII interfaces with 10/100/1000Mbps data transmission rates.
Note: 3.3V RGMII/RMII interface, some pin resources are shared.
l FlexBus (≤1 channel): Supports one flexible parallel bus interface - FlexBus interface, which can achieve high-speed I/O switching, and can emulate some standard protocols or irregular protocols. A typical application scenario is the combination of a high-speed 16-bit ADC and a 16-bit DAC.
Note: 3.3V interface, some pin resources are shared.
l DSMC (≤1 channel): Double Data Rate Serial Interface. Mainly used in PSRAM device communication or peripheral communication of LocalBus (such as FPGA). Note: 3.3V interface, some pin resources are shared.
l UART (≤12 channels): Maximum supported baud rate is 8Mbps.
Note: 1.8V/3.3V interface, some pin resources are shared.
l I³C (≤2 channels): Supports 7-bit and 10-bit address modes, with a maximum speed of up to 12.5 Mbit/s, compatible with I²C bus, with a maximum speed of up to 400 Kbit/s. Note: 1.8V/3.3V interface, some pin resources are shared.
l I²C (≤11 channels): Supports 7-bit and 10-bit address modes, with a maximum speed of up to 400 Kbit/s.
Note: 1.8V/3.3V interface, some pin resources are shared. SPI (≤5 channels): Configurable master/slave mode. Note: 1.8V/3.3V interface, some pin resources are shared.
l CAN (≤2 channels): Supports CAN-FD; supports 1Mbps.
Note: 1.8V/3.3V interface, some pin resources are shared.
l PWM (≤3 channels): 3 independent PWM controllers, supporting up to 16 PWM channels, 32-bit timer/counter.
Note: 1.8V/3.3V interface, some pin resources are shared.
Note: Some pin resources are multiplexed. Please refer to the Pin Function Comparison Table for details.









